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june 2010 doc id 17486 rev 2 1/17 17 strh100n10 n-channel 100 v, 0.030 ? , to-254aa rad-hard low gate charge stripfet? power mosfet features fast switching 100% avalanche tested hermetic package 70 krad tid single event effect (see) hardened seb & segr with 32 mev/cm 2 /mg let ions applications satellite high reliability description this n-channel power mosfet is realized with stmicroelectronics unique stripfet? process has specifically been designed to sustain high tid and provide immunity to heavy ion effects. it is also intended for any application with low gate charge drive requirements. this power mosfet is full escc qualified. figure 1. internal schematic diagram v bdss i d r ds(on) q g 100 v 48 a 30 mohm 135 nc to-254aa 1 2 3 table 1. device summary part number (1) escc part number quality level package lead finish mass (g) temp. range eppl strh100n10fsy1 - engineering model to-254aa gold 10 -55 to 125c - strh100n10fsy301 5205/021/01 escc flight target STRH100N10FSY302 5205/021/02 solder dip - 1. depending escc part number mentioned on the purchase order. www.st.com
contents strh100n10 2/17 doc id 17486 rev 2 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
strh100n10 electrical ratings doc id 17486 rev 2 3/17 1 electrical ratings (t c = 25 c unless otherwise specified) table 2. absolute maximum ratings (pre-irradiation) symbol parameter value unit v ds (1) 1. this rating is guaranteed @ t j 25 c (see figure 10: normalized bv dss vs temperature ). drain-source voltage (v gs = 0) 100 v v gs (2) 2. this value is guaranteed over the full range of temperature. gate-source voltage 20 v i d (3) 3. rated according to the rthj-case + rthc-s. drain current (continuous) 48 a i d (3) drain current (continuous) at t c = 100 c 30 a i dm (4) 4. pulse width limited by safe operating area. drain current (pulsed) 192 a p tot (3) total dissipation 170 w dv/dt (5) 5. i sd 48 a, di/dt 100 a/s, v dd = 80% v (br)dss. peak diode recovery voltage slope 2.6 v/ns t stg storage temperature - 55 to 150 c t j operating junction temperature c table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max 0.52 c/w r thc-s case-to-sink typ 0.21 c/w table 4. avalanche characteristics symbol parameter value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 24 a e as (1) single pulse avalanche energy (starting t j =25 c, i d = i ar , v dd =50 v) 954 mj e as single pulse avalanche energy (starting t j =110 c, i d = i ar , v dd =50 v) 280 mj e ar repetitive avalanche (v dd = 50 v, i ar = 24 a, f = 10 khz, t j = 25 c, duty cycle = 50%) 60 mj
electrical ratings strh100n10 4/17 doc id 17486 rev 2 e ar repetitive avalanche (v dd = 50 v, i ar = 24 a, f = 100 khz, t j = 25 c, duty cycle = 10%) 24 mj repetitive avalanche (v dd = 50 v, i ar = 24 a, f = 100 khz, t j = 110 c, duty cycle = 10%) 7.7 1. maximum rating value. table 4. avalanche characteristics (continued) symbol parameter value unit
strh100n10 electrical characteristics doc id 17486 rev 2 5/17 2 electrical characteristics (t c = 25 c unless otherwise specified). pre-irradiation table 5. on/off states (pre-irradiation) symbol parameter test conditions min. typ. max. unit i dss zero gate voltage drain current (v gs = 0) 80% bv dss 10 a i gss gate body leakage current (v ds = 0) v gs = 20 v 100 na bv dss (1) 1. this rating is guaranteed @ t j 25 c (see figure 10: normalized bv dss vs temperature ). drain-to-source breakdown voltage v gs = 0, i d = 1 ma 100 v v gs(th) gate threshold voltage v ds = v gs , i d = 1 ma 2 4.5 v r ds(on) static drain-source on resistance v gs = 12 v; i d = 24 a 0.030 0.035 ? table 6. dynamic (pre-irradiation) symbol parameter test conditions min. typ. max. unit c iss c oss (1) c rss input capacitance output capacitance reverse transfer capacitance v gs = 0, v ds = 25 v, f=1 mhz 3940 543 190 4925 679 237 5910 815 284 pf pf pf c oss eq. (1) 1. this value is guaranteed over the full range of temperature. equivalent output capacitance (2) 2. this value is defined as the ratio between the q oss and the voltage value applied. v gs = 0, v dd = 80 v 480 pf q g q gs q gd total gate charge gate-to-source charge gate-to-drain (?miller?) charge v dd = 50 v, i d = 48 a, v gs =12 v 108 22 36 135 27 45 162 32 54 nc nc nc r g (3) 3. not tested, guaranteed by process. gate input resistance f=1mhz gate dc bias=0 test signal level=20mv open drain 1.2 1.7 2 ? l g gate inductance 4.5 nh l s source inductance 7.5 nh l d drain inductance 7.5 nh
electrical characteristics strh100n10 6/17 doc id 17486 rev 2 table 7. switching times (pre-irradiation) symbol parameter test conditions min. typ. max unit t d(on) t r t d(off) t f turn-on delay time rise time turn-off-delay time fall time v dd = 50 v, i d = 24 a, r g = 4.7 ?, v gs = 12 v 24 34 79 33 29.5 43 99.2 42 35 52 119 50 ns ns ns ns table 8. source drain diode (pre-irradiation) (1) 1. refer to the figure 16 . symbol parameter test conditions min. typ. max unit i sd i sdm (2) 2. pulse width limited by safe operating area. source-drain current source-drain current (pulsed) 48 192 a a v sd (3) 3. pulsed: pulse duration = 300 s, duty cycle 1.5%. forward on voltage i sd = 48 a, v gs = 0 1.5 v t rr (4) q rr (4) i rrm (4) 4. not tested in production, guaranteed by process. reverse recovery time reverse recovery charge reverse recovery current i sd = 48 a, di/dt = 100 a/s v dd = 50 v, t j = 25 c 332 415 5 24 498 ns c a t rr (4) q rr (4) i rrm (4) reverse recovery time reverse recovery charge reverse recovery current i sd = 48 a, di/dt = 100 a/s v dd = 50 v, t j = 150 c 400 500 7 28 600 ns c a
strh100n10 radiation characteristics doc id 17486 rev 2 7/17 3 radiation characteristics the technology of the stmicroelectronics rad-hard power mosfets is extremely resistant to radiative environments. every manufacturing lot is tested for total ionizing dose (a) using the to-3 package. both pre-irradiation and post-irradiation performances are tested and specified using the same circuitry and test conditions in order to provide a direct comparison. (t amb = 22 3 c unless otherwise specified). total dose radiation (tid) testing one bias conditions using the to-3 package: ?v gs bias: + 15 v applied and v ds = 0 v during irradiation the following parameters are measured (see table 9 , table 10 and table 11 ): before irradiation after irradiation after 24 hrs @ room temperature after 240 hrs @ 100 c anneal a. irradiation done according to the escc 22900 specification, window 1). table 9. post-irradiation on/off states @ t j = 25 c, (co60 rays 70 k rad(si)) symbol parameter test conditions drift values ? unit i dss zero gate voltage drain current (v gs = 0) 80% bv dss +4 a i gss gate body leakage current (v ds = 0) v gs = 20 v 150 na bv dss drain-to-source breakdown voltage v gs = 0, i d = 1 ma -25% v v gs(th) gate threshold voltage v ds = v gs , i d = 1 ma -50% / + 5% v r ds(on) static drain-source on resistance v gs = 10 v; i d = 36 a 10% ? table 10. dynamic post-irradiation @ t j = 25 c, (co60 rays 70 k rad(si)) (1) 1. parameter not measured after irradiation but guar anteed by the results obtained during the evaluation phase that proves this parameter is directly correlated to the v gs(th) shift. symbol parameter test conditions drift values ? unit q g total gate charge i g = 1 ma, v gs = 12 v, v ds = 50 v, i ds = 40 a -5% / +50% nc q gs gate-source charge 35% q gd gate-drain charge -5% / +130%
radiation characteristics strh100n10 8/17 doc id 17486 rev 2 single event effect, soa the technology of the stmicroelectronics rad-hard power mosfets is extremely resistant to heavy ion environment for single event effect. (b) seb and segr tests have been performed with a fluence of 3e+5 ions/cm2. the accept/reject criteria are: seb test: drain voltage checked, trigger level is set to v ds = - 5 v. stop condition: as soon as a seb occurs or if th e fluence reaches 3e+5 ions/cm2. segr test: the gate current is monitored every 100 ms. a gate stress is performed before and after irradiation. stop condition: as soon as the gate current reaches 100 na (during irradiation or during pigs test) or if the fluence reaches 3e+5 ions/cm2. the results are: ? no seb ? segr test produces the following soa (see table 12: single event effect (see), safe operating area (soa) and figure 2: single event effect, soa ) table 11. source drain diode post-irradiation @ t j = 25 c, (co60 rays 70 k rad(si)) (1) 1. refer to figure 16 . symbol parameter test conditions drift values ? .unit v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 50 a, v gs = 0 10% v b. irradiation per mil-std-750e, method 1080 (bias circuit in figure 3: single event effect, bias circuit ). table 12. single event effect (see), safe operating area (soa) ion let (mev/(mg/cm 2 ) energy (mev) range (m) v ds (v) @v gs =0 @v gs = -2 v @v gs = -5 v @v gs = -10 v @v gs = -20 v kr 32 768 94 100 80 60 30 10
strh100n10 radiation characteristics doc id 17486 rev 2 9/17 figure 2. single event effect, soa figure 3. single event effect, bias circuit (c) c. bias condition during radiation refer to table 12: single event effect (see), safe operating area (soa) . 0 10 20 30 40 50 60 70 80 90 100 -20 -15 -10 -5 0 vgs (v) vds (% vdsmax ) kr (32 mev.cm2/mg)
electrical characteristics (curves) strh100n10 10/17 doc id 17486 rev 2 4 electrical characteristics (curves) figure 4. safe operating area figure 5. thermal impedance figure 6. output characteristics figure 7. transfer characteristics figure 8. gate charge vs gate-source voltage figure 9. capacitance variations 1000 100 10 id [a] 1 1 0 0.1 1 10 100 1000 vd s [v] tj=150c t j = 1 5 0 c tc=25c t c = 2 5 c s ingle p u l s e s i n g l e p u l s e 100 s 1 0 0 s 1m s 1 m s 10m s 1 0 m s dc d c oper a tion in thi s a re a i s o p e r a t i o n i n t h i s a r e a i s limited b y m a x r l i m i t e d b y m a x r d s (on) d s ( o n ) am04952v2 a m 0 4 9 5 2 v 2 10 -5 10 -4 10 - 3 10 -2 10 -1 t p ( s ) 10 - 3 10 -2 k 0.2 0.05 0.02 0.01 0.1 zth=k(rthj-c+rthc- s ) =tp/ tp s ingle p u l s e =0.5 10 -1 0.07 hg0k i d 0 v d s (v) (a) 5 12.5 0 50 100 150 200 5v 6v 7v v g s =12v 2.5 7.5 10 am01494v1 6 $3 6 ) $ 6 '3 6 ! 4 * ?# 4 * ?# 4 * ?# !-v 6 '3 1 g n# 6 6 $$ 6 ) $ ! ) $ ! ) $ ! ) $ ! 6 '3 6 4 * ?# !-v c 0.1 v d s (v) (pf) 1 1 100 10 ci ss co ss cr ss 10 1000 v d s =25v, v g s =0 f=1mhz, t j =25c am01496v1
strh100n10 electrical characteristics (curves) doc id 17486 rev 2 11/17 figure 10. normalized bv dss vs temperature figure 11. static drain-source on resistance figure 12. normalized gate threshold voltage vs temperature figure 13. normalized on resistance vs temperature figure 14. source drain-diode forward characteristics
test circuits strh100n10 12/17 doc id 17486 rev 2 5 test circuits figure 15. switching times test circuit for resistive load (1) 1. max driver v gs slope = 1v/ns (no dut) figure 16. source drain diode figure 17. unclamped inductive load test circuit (single pulse and repetitive)
strh100n10 package mechanical data doc id 17486 rev 2 13/17 6 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack is an st trademark.
package mechanical data strh100n10 14/17 doc id 17486 rev 2 figure 18. to-254aa mechanical drawing table 13. to-254aa mechanical data dim. mm inch min. typ. max. min. typ. max. a 6.32 6.20 0.249 0.260 a1 1.02 1.27 0.040 0.050 a2 3.81 0.150 b 0.89 1.27 0.035 0.050 b1 0.89 1.02 1.14 0.035 0.040 0.050 d 20.07 20.32 0.790 0.800 d1 13.59 13.84 0.535 0.545 d2 ------ e 3.81 0.150 e 13.59 13.84 0.535 0.545 l 13.46 13.97 0.530 0.550 l1 16.89 17.40 0.665 0.685 p 3.53 3.78 0.139 0.149
strh100n10 order codes doc id 17486 rev 2 15/17 7 order codes contact st sales office for informati on about the specific conditions for: products in die form tape and reel packing table 14. ordering information order code (1) escc part number quality level package lead finish eppl marking packing strh100n10fsy1 - engineering model to-254aa gold - strh100n10fsy1 beo strip pack strh100n10fsy301 5205/021/01 escc flight target 520502101 STRH100N10FSY302 5205/021/02 solder dip - 520502102 1. depending escc part number mentioned on the purchase order.
revision history strh100n10 16/17 doc id 17486 rev 2 8 revision history table 15. document revision history date revision changes 13-may-2010 1 first release. 14-jun-2010 2 updated table 1: device summary .
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